How to Study (Category: Education)
Say bye bye to baldness - hopefully :)

A very bright and hopeful news for all those who are very depressed of being bald at a very young age !

http://www.bbc.co.uk/news/health-17457098
So cheer up and good luck ! :)
polling in 8085 microprocessor
What do you mean by polling in 8085.
When the microprocessor receives an Interrupt Service Request (ISR) on the interrupt line it must determine which of the devices connected to that input sent the request.
Software Polling is one method by which it can do so.
In Software Polling:
A software routine is used to identify the device requesting service. It does so by checking each device to see if it was the one needing service.
hardware interrupts in 8085 microprocessor
• When a device interrupts, it actually wants the MP to give a service which is equivalent to asking the MP to call a subroutine. This subroutine is called ISR (Interrupt Service Routine)
• Interrupts:
• The 8085 microprocessor has 5 interrupts. They are presented below in the order of their priority (from lowest to highest):
• INTR is mask able 8080Acompatible interrupt. When the interrupt occurs the processor fetches from the bus one instruction.
• RST5.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 2Ch (hexadecimal) address.
• RST6.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34Ch (hexadecimal) address.
• RST7.5 is a mask able interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 3Ch (hexadecimal) address.
• Trap is a non-maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 24h (hexadecimal) address.
• All maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5, RST6.5 and RST7.5 interrupts can be enabled or disabled individually using SIM instruction.
Memory Mapping Scheme
What is the memory mapping scheme? Give any one advantage and disadvantage.
MEMORY MAPPING SCHEME:
WEB MAPPING:
Web mapping is the process of designing, implementing, generating and delivering maps on the World Wide Web and its product.
ADVANTAGE & DISADVANTAGE:
While web mapping primarily deals with technological issues, web cartography additionally studies theoretic aspects: the use of web maps, the evaluation and optimization of techniques and workflows, the usability of web maps, social aspects, and more.
Web maps can easily deliver up to date information. If maps are generated automatically from databases, they can display information in almost realtime. They don't need to be printed, mastered and distributed.
Reliability issues – the reliability of the internet and web server infrastructure is not yet good enough. Especially if a web map relies on external, distributed data sources, the original author often cannot guarantee the availability of the information.
Jump Command
If the program counter is always one count ahead of the memory locations from which the machine code is being fetched, how does the microprocessor change the sequence of program execution with a "Jump" execution?
During a jump instruction, the program counter is loaded with a new address that is not necessarily the address of the next sequential instruction. After a jump, the program execution continues from the new location in memory.
similarities between CALL_RET and PUSH_POP instructions
List out the similarities between CALL_RET and PUSH_POP instructions.
| When CALL is executed the microprocessor automatically stores the 16-bit address of the instruction next to CALL on the stack pointer. | The programmer uses the instruction PUSH to save the contents of the register pair on the stack. |
RET transfers the contents of the top two locations of the stack to the PC. | POP transfers the contents of the top two locations of the stack to the specified register pair. |
| Has 8 conditional RETURN instructions. | No conditional POP instructions. |
initiate hardware interrupts in 8085 microprocessor
List the type of signals that have to be applied to initiate hardware interrupts in 8085.
It has three pins for interrupts; NMI, IRQ and FIRQ. A low level on any of these pins will cause an interrupt. The machine state will then be stacked and the routine entered. The appropriate routine address is found in a table of interrupt vectors. Two locations are dedicated to each Interrupt pin, in which are loaded the two bytes of the interrupt routine address.
An order of priority is imposed - the interrupts at the top of the list set the flag bits of the other interrupts to stop them interrupting during the interrupt service routine. The former values of these bits are restored when the flag register is pulled off the stack on return from the interrupt. Further interrupts are then free to occur thereafter.
